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16 bit microcontroller tlcs-900/l1 series tmp91fu62fg TMP91FU62DFG revision 1.1 toshiba corporation
the information contained herein is subject to change without notice. toshiba is continually working to improve the qual ity and reliability of its products. nevertheless, semiconductor devices in general can malfunction or fa il due to their inherent electrical sensitivity and vulnerability to physical stress. it is the responsibility of the buyer, when utilizi ng toshiba products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such toshiba products could cause loss of human life, bodily injury or damage to property. in developing your designs, please ensure that to shiba products are used w ithin specified operating ranges as set forth in the most recent toshiba products specifications. also, please keep in mind the precauti ons and conditions set forth in the ? handling guide for semiconductor devices, ? or ? toshiba semiconductor reliability handbook ? etc. the toshiba products listed in this document are intended for usage in genera l electronics applications (computer, personal equipment, office equipment, m easuring equipment, indust rial robotics, domestic appliances, etc.). these toshiba products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ( ? unintended usage ? ). unintended usage include atomic energy control instruments, airplane or spaceship instruments, transportation instru ments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc. unintended usage of toshiba products listed in this document shall be made at the customer's own risk. the products described in this document shall not be used or embedded to any downstream products of which manufacture, use and/or sale are prohibited under any applicable laws and regulations. the information contained herein is presented only as a guide for the applications of our products. no responsibility is assumed by to shiba for any infringements of patents or other rights of the third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of toshiba or others. please contact your sales representative for product-by-product details in this document regarding rohs comaptibility. please use these products in this docum ent in compliance with all applicable laws and regulations that regulate ths inclusion or use of c ontrolled substances. toshiba assumes no liability for damage or losses occurring as a result of nonc ompliance with applicable laws and regulations. ? 2007 toshiba corporation all rights reserved tmp91fu62 revision history date revision 2007/01/18 0.2 tentative 2007/04/27 0.4 table 1-1 pin names and functions ? wait pin deletion. ? hv-monitor emu0 ? p00-p07 large-current port 2.1 reset 10 system clocks 16us 1us 2.3.4 prescaler clock controller table 4-1 port functions table 4-2 i/o port setting list 4.3 port3 (p30 to p33) deleted the input functi on of wait control(wait) deleted note2. p40 to p43 function table. 4.9.1 port 90 (txd0/rxd0), 93 (txd1/rxd0) 4.9.2 port91(rxd0/txd0), 94 (rxd1/txd1) pb0 to pb2 function table. 4.12 open-drain control 4.13 serial channel pin change control 14.1 absolute maximum ratings table 2-7 source of halt state clearance and halt clearance operation table 4-2 i/o port setting list (port b) 4.1 port 0 (p00 to p07) 4.2 port 1 (p10 to p17) 4.4 port 4 (p40 to p43) figure 4-12 port72 4.13 serial channel pin change/ open-drain output control table 6-1 registers and pins for tmrb 9. 10-bit ad converter (adc) vrefh avcc figure 9-4 analog input voltage and ad conversion result (typ.) 13.6.10 programming the flash memory by the internal cpu ? read values in product id mode ? example: program to be loaded and executed in ram 14.2 dc electrical characteristics low-level output current 14.3 ad conversion characteristics deleted analog current for analog reference voltage 15.table of sfr?s deleted p4fc register tmp91fu62 date revision 2007/06/07 0.5 14.1 absolute maximum ratings i ol , i oh is corrected 14.2 dc electrical characteristics i cc , i ddp-p is corrected 2007/8/27 1.0 dmar register (89h) is corrected by rwm prohibition. 17.2 points of note j. releasing the halt mode by requesting an interruption is deleted. 2.3.2 note3 is added 7.2.1 plescaler is corrected, and table 7-2 is corrected 7.3 note2 and note3 are added 17.2 points of note j.clocks for serial channels (sio) is added 2007/10/10 1.1 6.3 sfr 15. table of sfr?s tb0ffcr, tb1ffcr, tb2ffcr and tb3ffcr register is corrected. page 1 2007-10-10 20070701-en ? the information contained herein is subject to change without notice. ? toshiba is continually working to improve the quality and reli ability of its products. nevertheless, semiconductor devices in general can malfunction or fail due to their inherent el ectrical sensitivity and vulnerability to physical stre ss. it is the responsibility of the buyer, when utilizing toshiba products, to comply with the standards of sa fety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such toshiba products could cause loss of human life, bodily injury or damage to property. in developing your designs, pleas e ensure that toshiba products are used within specified operating ranges as set forth in the most recent toshiba products specifications. also, please keep in mind the precautions and conditions set forth in the ?handling gui de for semiconductor devices,? or ?toshiba semiconductor reliability handbook? etc. ? the toshiba products listed in this document are intended for usage in general electronics applic ations (computer, personal eq uip- ment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). these toshiba products are neithe r intended nor warranted for usage in equipment that requires extr aordinarily high quality and/or re liability or a malfunctionor failure of which may cause loss of human life or bod ily injury (?unintended usage?). unintended us age include atomic energy control instru ments, airplane or spaceship instruments, transporta tion instruments, traffic signal instrume nts, combustion control instruments, medi cal instru- ments, all types of safety dev ices, etc. unintended usage of toshiba products li sted in this document shall be made at the cust omer's own risk. ? the products described in this document shall not be used or embedded to any downstream products of which manufacture, use and/or sale are prohibited under any appl icable laws and regulations. ? the information contained herein is present ed only as a guide for the applications of our products. no responsibility is assum ed by toshiba for any infringements of patents or other rights of the th ird parties which may result from its use. no license is gran ted by impli- cation or otherwise under any patents or other rights of toshiba or the third parties. ? please contact your sales representative for product-by-product details in this document regarding rohs compatibility. please use these products in this document in compliance wi th all applicable laws and regulations that regulate the inclusion or use of controll ed sub- stances. toshiba assumes no liability for damage or losses occuur ing as a result of noncompliance with applicable laws and regu lations. this product uses the super flash ? technology under the licence of silicon storage technology, inc. super flash ? is registered trademark of silicon storage technology, inc. tmp91fu62 cmos 16 bit microcontroller tmp91fu62fg/dfg 1.1 features ? high-speed 16-bit cpu (900/l1 cpu) - instruction mnemonics are upward-compatible with tlcs-900,900/h,900/l - 16 mbytes of linear address space - general-purpose registers and register banks - 16-bit multiplication and division instructions; bit transfer and arithmetic instructions - micro dma: 4 channels (800ns/2 bytes at 20mhz) ? minimum instruction execution time:200ns (at 20mhz) ? built-in memory - rom: 96k bytes (flash rom) - ram: 4k bytes ? 8-bit timers: 4 channels ? 16-bit timers: 4 channels ? general-purpose serial interface: 4 channels - uart/synchronous mode: 3 channels -i 2 c bus mode: 1 channels ? 10-bit ad converter (built-in sample hold circuit): 16 channels ? special timer for clock ? watchdog timer ? program patch logic: 6 banks product no. rom (flash rom) ram package tmp91fu62fg 96k bytes 4k bytes lqfp80-p-1212-0.50e TMP91FU62DFG qfp80-p-1420-0.80b page 2 2007-10-10 tmp91fu62 ? interrupts: 48 interrupts - 9 cpu interrupts: software interrupt instruction and illegal instruction - 30 internal interrupts: 7 priority levels are selectable - 9 external interrupts: 7 priority levels are sel ectable (among 1 interrupts are selectable edge mode) ? input/output ports: 69 pins ? standby function: three halt modes: idle2 (programmable), idle1 and stop ? clock controller - clock gear function: select a high-frequency clock fc/1 to fc/16 - oscillator for clock (fs = 32.768 khz) ? operating voltage flash read operation > vcc=4.5 v - 5.5 v (fc max = 20mhz) flash write/erase operation > vcc=4.75 v - 5.25 v (fc max = 20mhz) ? package - lqfp80-p-1212-0.50e (tmp91fu62fg) - qfp80-p-1420-0.80b (TMP91FU62DFG) page 3 2007-10-10 tmp91fu62 1.2 pin assignment diagram figure 1-1 pin assignment(tmp91fu62fg) tmp91fu62fg lqfp80 topview 1 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 avss p70/ta0in p71/ta1out p72 p 73/ta4in p74/ta5out p75/int0 p80/tb0in0/int5 p81/tb0in1/int6 avcc p82/tb0out0 p83/tb0out1 p84/tb1in0/int7 p85/tb1in1/int8 p86/tb1out0 p87/tb1out1 p92/sclk0/cts0 p95/sclk1/cts1 p94/rxd1/txd1 p30/tb3in0/int3/sda0 p17 p16 p15 p14 p13 p12 p11 p10 p07 p06 p05 p04 p03 p02 p01 p00 p40/scout pa3/tb2out1 pa2/tb2out0 pa1/tb2in1/int2 pa0/tb2in0/int1 p97/xt2 p96/xt1 reset am1 x1 dvss x2 p60/an8 p65/an13 p57/an7 p61/an9 p62/an10 p63/an11 p64/an12 p55/an5 p66/an14 p67/an15 p53/an3 p52/an2 p51/an1 p50/an0 p33/tb3out1 p56/an6 p54/an4 emu0 p43/sclk2/cts2 p42/rxd2/txd2 p41/txd2/rxd2 dvcc am0 p90/txd0/rxd0 p91/rxd0/txd0 p93/txd1/rxd1 dvss p31/tb3in1/int4/scl0 p32/tb3out0 pb1 pb2 pb0 page 4 2007-10-10 tmp91fu62 figure 1-2 pin assi gnment(TMP91FU62DFG) TMP91FU62DFG qfp80 topview 35 45 avss avcc p70/ta0in p71/ta1out p72 p73/ta4in p74/ta5out p75/int0 p80/tb0in0/int5 p81/tb0in1/int6 dvcc 1 10 5 15 20 40 80 p82/tb0out0 p83/tb0out1 p84/tb1in0/int7 p85/tb1in1/int8 p86/tb1out0 p87/tb1out1 p90/txd0/rxd0 p91/rxd0/txd0 p92/sclk0/cts0 p93/txd1/rxd1 am0 25 x2 dvss x1 am1 30 reset p94/rxd1/txd1 p95/sclk1/cts1 p96/xt1 p97/xt2 pa0/tb2in0/int1 pa1/tb2in1/int2 pa2/tb2out0 pa3/tb2out1 p40/scout p41/txd2/rxd2 p42/rxd2/txd2 p43/sclk2/cts2 emu0 p00 p01 p02 p03 p04 p05 p06 p07 dvss 50 p10 p11 p12 p13 p14 p15 p16 p17 55 60 p30/tb3in0/int3/sda0 p31/tb3in1/int4/scl0 p32/tb3out0 p33/tb3out1 pb0 65 pb1 pb2 p50/an0 p51/an1 p52/an2 p53/an3 p54/an4 p55/an5 p56/an6 p57/an7 70 75 p60/an8 p61/an9 p62/an10 p63/an11 p64/an12 p65/an13 p66/an14 p67/an15 page 5 2007-10-10 tmp91fu62 1.3 block diagram figure 1-3 block diagram + : + ; + < |